2005 IEEE Dallas/CAS Workshop on Architecture, Circuits and Implementtation of SOCs

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2005 IEEE Dallas/CAS Workshop on Architecture, Circuits and Implementtation of SOCs - 最新文献

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Yield aware design methodology for sub-100-nanometer digital SOC designs

Pub Date : 2005-10-10 DOI: 10.1109/DCAS.2005.1611178 C. Sundaram, P. Balsara, S. Vemulapalli, P. Vallur, O. Eliezer

Interpolative pulse-shape filtering for a GSM/Bluetooth transmitter

Pub Date : 2005-10-10 DOI: 10.1109/DCAS.2005.1611168 R. Staszewski, R. Staszewski

FinFET current mirror design and evaluation

Pub Date : 2005-10-10 DOI: 10.1109/DCAS.2005.1611167 A. Marshall, M. Kulkarni, M. Campise, R. Cleavelin, C. Duvvury, H. Gossner, M. Gostkowski, G. Knoblinger, C. Pacha, C. Russ, K. Schruefer, T. Schulz, K. VonArnim, B. Wilks, W. Xiong

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