{"title":"Investigation of UIS Capability for −600V Class Vertical SiC p-channel MOSFET","authors":"Kailun Yao, H. Yano, N. Iwamuro","doi":"10.1109/ISPSD.2019.8757607","DOIUrl":null,"url":null,"abstract":"Vertical planar gate 4H-SiC p-ch SiC MOSFET is fabricated as a potential candidate for complementary power applications. Its unclamped inductive switching (UIS) capability is investigated by measurement and TCAD simulation. The p-ch SiC MOSFET shows a low UIS capability rather than n-ch SiC MOSFET because of the unoptimized termination structure. The UIS capability of p-ch MOSFET can be improved by good design of edge region.","PeriodicalId":225029,"journal":{"name":"2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2019.8757607","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Vertical planar gate 4H-SiC p-ch SiC MOSFET is fabricated as a potential candidate for complementary power applications. Its unclamped inductive switching (UIS) capability is investigated by measurement and TCAD simulation. The p-ch SiC MOSFET shows a low UIS capability rather than n-ch SiC MOSFET because of the unoptimized termination structure. The UIS capability of p-ch MOSFET can be improved by good design of edge region.
垂直平面栅极4H-SiC p-ch SiC MOSFET是互补功率应用的潜在候选器件。通过测量和TCAD仿真研究了其无箝位电感开关(UIS)性能。由于端接结构未优化，p-ch SiC MOSFET的UIS性能较n-ch SiC MOSFET低。良好的边缘区域设计可以提高p-ch型MOSFET的usis性能。
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