Zongming Duan, Dongfang Pan, Bowen Wu, Yan Wang, Bingbing Liao, Dong Huang, Yanhui Wu, Daiguo Xu, Hua Xu, Wei Lv, Yuefei Dai, Pei Li, Yan Wang, F. Lin
{"title":"A 76-81GHz FMCW Transceiver with 3-Transmit, 4-Receive Paths and 15dBm Output Power for Automotive Radars","authors":"Zongming Duan, Dongfang Pan, Bowen Wu, Yan Wang, Bingbing Liao, Dong Huang, Yanhui Wu, Daiguo Xu, Hua Xu, Wei Lv, Yuefei Dai, Pei Li, Yan Wang, F. Lin","doi":"10.1109/rfic.2019.8701731","DOIUrl":null,"url":null,"abstract":"A fully-integrated 76-81GHz FMCW transceiver in 65-CMOS is presented for automotive radar applications. The transceiver consists of 3-transmiter, 4-receiver, FMCW synthesizer and ADC with decimation filters. The transmitter, with a TX chain including a push-push doubler, a 3-stage power amplifier employing neutralization technique and 2 power-combined topologies, shows an output power of 15dBm. The receiver, with an LNA employing a 3-stage neutralized common source (CS) with inductive degeneration, achieves a noise figure of 15dB, an input P-1dB of −20dBm, and an ENOB of 10.2-b for ADC. The double tuning modulated PLL provides FMCW waveform with −81dBc/Hz phase noise at 1MHz offset and chirp rate of 50MHz/us. The power consumption of the entire transceiver is 1.06W.","PeriodicalId":281385,"journal":{"name":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/rfic.2019.8701731","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
A fully-integrated 76-81GHz FMCW transceiver in 65-CMOS is presented for automotive radar applications. The transceiver consists of 3-transmiter, 4-receiver, FMCW synthesizer and ADC with decimation filters. The transmitter, with a TX chain including a push-push doubler, a 3-stage power amplifier employing neutralization technique and 2 power-combined topologies, shows an output power of 15dBm. The receiver, with an LNA employing a 3-stage neutralized common source (CS) with inductive degeneration, achieves a noise figure of 15dB, an input P-1dB of −20dBm, and an ENOB of 10.2-b for ADC. The double tuning modulated PLL provides FMCW waveform with −81dBc/Hz phase noise at 1MHz offset and chirp rate of 50MHz/us. The power consumption of the entire transceiver is 1.06W.