An in-memory monitoring database for self adaptive MP2SoCs

Abstract

The complexity of MP2SoC architectures to come is such that many issues arise simultaneously, such as multicore programming, system performance, reliability, scalability, etc. The key to solve these issues is self-adaptability: the chips to come have to integrate the required software and hardware means to monitor and self-react to the various kinds of events that are likely to occur during chip's lifetime. The paper describes the design principles of a software based approach used to monitor manycore architectures running multi-threaded functional applications. The approach takes advantage of an in-memory database (as well as appropriate means to store, handle, and retrieve accumulated monitoring data) to achieve the monitoring task as simply as possible. After a presentation of the distributed database (called DRET), a case study is presented, along with performance results that clearly show the interest of the approach.