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2009 IEEE Workshop on Signal Propagation on Interconnects最新文献

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Modeling multi-port systems from frequency response data via tangential interpolation 通过切向插值从频率响应数据建模多端口系统
Pub Date : 2009-05-12 DOI: 10.1109/SPI.2009.5089847
S. Lefteriu, A. Antoulas
System identification from frequency domain data arises in many areas, e.g., in control, electronics, mechanical and civil engineering and many other fields. Currently available techniques work well for the single input single output case. However, for the case of large numbers of inputs and outputs, present methods are expensive. This paper proposes a new approach which is based on the concept of tangential interpolation. Our approach allows the identification of the underlying system using small CPU times. The numerical results we present show that our algorithms yield more accurate models in less time, when compared to the column-wise implementation of vector fitting.
基于频域数据的系统识别在许多领域都有应用,例如控制、电子、机械和土木工程等许多领域。目前可用的技术在单输入单输出情况下工作得很好。然而,对于大量输入和输出的情况,目前的方法是昂贵的。本文提出了一种基于切向插值的新方法。我们的方法允许使用较少的CPU时间来识别底层系统。我们提出的数值结果表明,与列式矢量拟合实现相比,我们的算法在更短的时间内产生更准确的模型。
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引用次数: 12
Multi-gigabit serial link emissions and mobile terminal antenna interference 多千兆串行链路发射和移动终端天线干扰
Pub Date : 2009-05-12 DOI: 10.1109/SPI.2009.5089837
M. Voutilainen, M. Rouvala, P. Kotiranta, T. Von Rauner
Future mobile terminal digital interconnections are introducing spectrum components in cellular frequencies in an increasing manner. Control of interconnection impedance and common mode noise introduced from them are key elements for robust device design. Electromagnetic coupling from multi-gigabit serial links used for display and camera data transmission in mobile device to positioning and cellular wireless communication receivers depends mainly on common-mode content of serial link signal, and on common-mode coupling strength between the serial link interconnection and cellular receiver antenna. Frequency spectrum of common-mode component of serial link output voltage and current are determined by simulations or measurements, and 8-port S-parameters are used in calculations of induced disturbance power coupled to cellular receiver. Minimum required common-mode attenuation was found to be typically −60dB.
未来的移动终端数字互联将越来越多地引入蜂窝频率中的频谱分量。互连阻抗的控制以及由此产生的共模噪声是鲁棒器件设计的关键因素。从移动设备中用于显示和摄像数据传输的多千兆串行链路到定位和蜂窝无线通信接收机的电磁耦合主要取决于串行链路信号的共模内容,以及串行链路互连与蜂窝接收天线之间的共模耦合强度。通过仿真或测量确定了串行链路输出电压和电流共模分量的频谱,并采用8口s参数计算了蜂窝接收机的感应干扰功率。最小所需的共模衰减通常为- 60dB。
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引用次数: 28
Extraction of broadband error boxes for microprobes and recessed probe launches for measurement of printed circuit board structures 用于印刷电路板结构测量的微探头宽频带误差盒的提取和嵌入式探头发射
Pub Date : 2009-05-12 DOI: 10.1109/SPI.2009.5089854
M. Kotzev, R. Rímolo-Donadío, C. Schuster
This paper presents results for the error boxes (two-port scattering parameters) of ground-signal-ground (GSG) mini-coaxial probes (microprobes) and recessed probe launches up to 20 GHz. The recessed probe launch uses internal GSG pads for the access of embedded printed circuit board (PCB) structures without the need for signal vias. The error boxes were obtained by using two-tier calibration techniques where the first tier was based on short-open-load-through (SOLT) and the second tier on short-open-load (SOL) or through-reflect-line (TRL) calibration algorithms. Results from different calibration set ups are compared with each other and agree well. The obtained error boxes can be used for deembedding or analysis of the microprobe and probe launch performance.
本文给出了地-信-地(GSG)微型同轴探头(微探头)和发射频率高达20 GHz的嵌入式探头的误差盒(双端口散射参数)的计算结果。嵌入式探针发射使用内部GSG衬垫来访问嵌入式印刷电路板(PCB)结构,而不需要信号过孔。使用两层校准技术获得误差框,其中第一层基于短开负载通过(SOLT),第二层基于短开负载(SOL)或穿透反射线(TRL)校准算法。对不同标定装置的标定结果进行了比较,结果吻合较好。得到的误差框可用于微探针的解嵌或微探针发射性能分析。
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引用次数: 7
Parameterized macromodels of multiconductor transmission lines 多导体传输线的参数化宏模型
Pub Date : 2009-05-12 DOI: 10.1109/SPI.2009.5089845
G. Antonini, F. Ferranti, T. Dhaene, L. Knockaert
We introduce a novel parametrization scheme for lossy and dispersive multiconductor transmission lines (MTLs) having a cross-section depending on geometrical and physical parameters, that is suitable to interconnect modeling. The proposed approach is based on the dyadic Green's function method for the analysis of lossy and dispersive MTLs which is parameterized by using the Multivariate Orthonormal Vector Fitting (MOVF) technique to build parametric macromodels in a rational form. Design parameters, such as substrate or geometrical layout features, in addition to frequency, can be easily handled. The rational form of the multi-port macromodel describing the MTL is a direct consequence of the MOVF technique and is especially suited to generate state-space macromodels or to be synthesized into equivalent circuits, which can be easily embedded into conventional SPICE-like solvers. A numerical example is presented providing evidence of the accuracy of the proposed approach in both frequency and time-domain.
针对具有几何和物理参数的截面的损耗和色散多导体传输线,提出了一种适合于互连建模的参数化方案。该方法基于二进格林函数法分析有耗和色散MTLs,并采用多变量正交向量拟合(MOVF)技术对MTLs进行参数化,建立合理形式的参数化宏观模型。设计参数,如基片或几何布局特征,除了频率,可以很容易地处理。描述MTL的多端口宏模型的合理形式是MOVF技术的直接结果,特别适合于生成状态空间宏模型或合成成等效电路,这可以很容易地嵌入到传统的SPICE-like求解器中。最后给出了一个算例,证明了该方法在频域和时域上的准确性。
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引用次数: 1
Acceleration of Transverse Waveform Relaxation using waveform compression 利用波形压缩的横向波形松弛加速度
Pub Date : 2009-05-12 DOI: 10.1109/SPI.2009.5089861
T. Maestri, I. Elfadel, A. Ruehli
In this paper, we present a novel fast algorithm for Transverse Waveform Relaxation (TWR) using waveform compression. The core concept of the algorithm is to eliminate redundancies in TWR waveforms signals both before and after the relaxation source update step of the traditional TWR process. The new TWR algorithm is implemented using the application programming interface of an industrial circuit simulation program and is illustrated on a test suite of on-chip data buses having up to 40 coupled transmission lines. Numerical simulations show that speedups as high as 12X can be achieved with respect to a TWR algorithm without waveform compression.
本文提出了一种基于波形压缩的横向波形松弛(TWR)快速算法。该算法的核心思想是在传统TWR过程的松弛源更新步骤前后消除TWR波形信号中的冗余。利用工业电路仿真程序的应用编程接口实现了新的TWR算法,并在具有多达40条耦合传输线的片上数据总线测试套件上进行了演示。数值模拟表明,相对于没有波形压缩的TWR算法,可以实现高达12倍的加速。
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引用次数: 0
Self-consistent simulation of optoelectronic circuits using a SPICE-like framework 使用SPICE-like框架的光电电路自洽仿真
Pub Date : 2009-05-12 DOI: 10.1109/SPI.2009.5089843
P. Gunupudi, T. Smy, J. Klein, J. Jakubczyk
This paper presents a self-consistent simulation methodology for co-simulation of optical and electrical components in a SPICE-like simulation framework. The framework specifies a flexible optical signal structure that allows for bi-directional optical signals, polarization, optical interference and source/detector non-linearities. A C implementation of this method was successfully tested on several industry standard optoelectronic circuits and satisfactory results were obtained.
本文提出了一种自洽仿真方法,用于在类似spice的仿真框架中对光学和电子元件进行联合仿真。该框架规定了一个灵活的光信号结构,允许双向光信号、偏振、光干涉和源/检测器非线性。该方法的C实现在几种工业标准光电电路上成功地进行了测试,获得了满意的结果。
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引用次数: 3
Sensitivity of output response to geometrical dimensions in VLSI interconnects VLSI互连中输出响应对几何尺寸的敏感性
Pub Date : 2009-05-12 DOI: 10.1109/SPI.2009.5089863
Agnieszka Ligocka-Wardzinska, W. Bandurski
The paper presents a sensitivity analysis of step and ramp response of VLSI interconnects to geometrical dimensions of microstrip model of higher level interconnects. The method is based on analytical form of VLSI output response calculated using multiple scales method.
本文分析了超大规模集成电路互连的阶跃和斜坡响应对高电平互连微带模型几何尺寸的敏感性。该方法基于超大规模集成电路输出响应的解析形式,采用多尺度法计算。
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引用次数: 2
Effect of underlayer dummy fills on on-chip transmission line 底层假人填充对片上传输线的影响
Pub Date : 2009-05-12 DOI: 10.1109/SPI.2009.5089867
A. Tsuchiya, H. Onodera
This paper discusses the effect of CMP dummy fill on on-chip transmission-lines. In recent fabrication processes that use Cu wire, CMP dummy fill is inserted to suppress the variation of the metal thickness. In high frequency above 10GHz, the eddy current in the dummy fills affects the characteristics of on-chip transmission-line. However it is not clear that which dummy fill has the strong impact. This paper evaluates the relationship between the effect and the location of dummy fills by a 3D field-solver. The experimental results show that there is a region where the dummy fills have strong impact on the loss characteristics. The effect of the dummy fills in the region is nearly two times larger than that in the other region.
本文讨论了CMP假体填充对片上传输线的影响。在最近使用铜丝的制造工艺中,为了抑制金属厚度的变化,采用了CMP假体填充。在10GHz以上的高频中,假填充物中的涡流影响片上在线传输的特性。然而,目前尚不清楚哪个虚拟填充具有强大的影响。本文利用三维场解算器对虚拟填充效果与位置的关系进行了评价。实验结果表明,存在一个虚拟填充对损失特性影响较大的区域。虚拟填充在该区域的影响几乎是其他区域的两倍。
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引用次数: 2
SPI proceedings: BER simulation for high-speed serial links with crosstalk, noise, ISI and Jitter using Quasi-Analytical Method SPI论文集:用准解析方法模拟具有串扰、噪声、ISI和抖动的高速串行链路的误码率
Pub Date : 2009-05-12 DOI: 10.1109/SPI.2009.5089865
D. Lu, Chunxing Huang, Xiaoqing Dong, Daoxue Hu
For high-speed serial links, the most important performance measurement is the bit error rate (BER). Many papers have proposed methods to calculate or estimate the BER under the conditions of systems with Jitter and ISI. One of these, StatEye method is very popular, using colored BER contours in StatEye, the BER can be estimated.
对于高速串行链路,最重要的性能测量是误码率(BER)。许多论文已经提出了在存在抖动和ISI的情况下计算或估计系统误码率的方法。其中,StatEye方法非常流行,使用StatEye中的彩色误码率轮廓,可以估计误码率。
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引用次数: 0
Towards supply-grid-based derating of timing margins 实现基于供电网的时间边际降额
Pub Date : 2009-05-12 DOI: 10.1109/SPI.2009.5089868
L. Svensson, J. Pihl, D. Andersson, Bjorn Nilsson, P. Larsson-Edefors
We investigate the influence of a realistic supply voltage network on the timing margins for a commercially-available 32-bit processor chip. Detailed models of the supply network and switching activity produce a spatial map of the supply voltage waveforms. We relate these waveforms to the expected excess logic delays, and estimate the required derating of the critical setup paths.
我们研究了实际供电电压网络对商用32位处理器芯片的时序裕度的影响。供电网络和开关活动的详细模型产生了供电电压波形的空间图。我们将这些波形与预期的多余逻辑延迟联系起来,并估计临界设置路径所需的降额。
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引用次数: 1
期刊
2009 IEEE Workshop on Signal Propagation on Interconnects
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