Pub Date : 1994-05-02DOI: 10.1109/MPCS.1994.367041
V. De Florio, F. Murgolo, V. Spinelli
As is well known, a parallel program is conceivable by means of a mixture of three computational models i.e., message passing, distributed data structures, and live data structures. Even though these models could be theoretically used for the design of one application, their current implementations can't be easily interfaced to each other. The PvmLinda project aims to create a tool which gives the designer a single product which embeds two computational paradigms, namely message passing and live data structure; the result is a new computational environment where the paradigms can be used in a fully integrated way.<>
{"title":"PvmLinda: integration of two different computation paradigms","authors":"V. De Florio, F. Murgolo, V. Spinelli","doi":"10.1109/MPCS.1994.367041","DOIUrl":"https://doi.org/10.1109/MPCS.1994.367041","url":null,"abstract":"As is well known, a parallel program is conceivable by means of a mixture of three computational models i.e., message passing, distributed data structures, and live data structures. Even though these models could be theoretically used for the design of one application, their current implementations can't be easily interfaced to each other. The PvmLinda project aims to create a tool which gives the designer a single product which embeds two computational paradigms, namely message passing and live data structure; the result is a new computational environment where the paradigms can be used in a fully integrated way.<<ETX>>","PeriodicalId":64175,"journal":{"name":"专用汽车","volume":"1 1","pages":"488-495"},"PeriodicalIF":0.0,"publicationDate":"1994-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83082404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-02DOI: 10.1109/MPCS.1994.367055
S. Cartier, P. Fiorini, B. Hoeltzener-Douarin, E. Pissaloux
This paper describes a research proposal related to the design of parallel software for image processing. The proposal focuses on the design of a tool, which generates the best implementation of a given application taking into account different parallel programming models available on different parallel (heterogeneous) computers. All steps needed for the automatic mapping of applications are presented.<>
{"title":"Toward a tool for automatic implementation of parallel image processing applications","authors":"S. Cartier, P. Fiorini, B. Hoeltzener-Douarin, E. Pissaloux","doi":"10.1109/MPCS.1994.367055","DOIUrl":"https://doi.org/10.1109/MPCS.1994.367055","url":null,"abstract":"This paper describes a research proposal related to the design of parallel software for image processing. The proposal focuses on the design of a tool, which generates the best implementation of a given application taking into account different parallel programming models available on different parallel (heterogeneous) computers. All steps needed for the automatic mapping of applications are presented.<<ETX>>","PeriodicalId":64175,"journal":{"name":"专用汽车","volume":"89 1","pages":"382-390"},"PeriodicalIF":0.0,"publicationDate":"1994-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81462106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-02DOI: 10.1109/MPCS.1994.367085
N. Bagherzadeh, M. Dowd
The problem of whether an assignment in the hypercube H/sub n/, where the distance from the source to the destination is bounded, can be routed with minimum distance and bounded congestion is considered. It is shown that this is so, if assignments of given "type" can be so routed. Of particular interest is whether for distance 3 and fixed type, minimum distance and congestion 1 can be obtained. This is shown for n/spl les/6; on the other hand the method suggests possible counter examples. Also, it is shown that distance 2 permutations in H/sub 4/ have congestion 1 routings.<>
{"title":"Problems on routing bounded distance assignments in hypercubes","authors":"N. Bagherzadeh, M. Dowd","doi":"10.1109/MPCS.1994.367085","DOIUrl":"https://doi.org/10.1109/MPCS.1994.367085","url":null,"abstract":"The problem of whether an assignment in the hypercube H/sub n/, where the distance from the source to the destination is bounded, can be routed with minimum distance and bounded congestion is considered. It is shown that this is so, if assignments of given \"type\" can be so routed. Of particular interest is whether for distance 3 and fixed type, minimum distance and congestion 1 can be obtained. This is shown for n/spl les/6; on the other hand the method suggests possible counter examples. Also, it is shown that distance 2 permutations in H/sub 4/ have congestion 1 routings.<<ETX>>","PeriodicalId":64175,"journal":{"name":"专用汽车","volume":"20 1","pages":"126-131"},"PeriodicalIF":0.0,"publicationDate":"1994-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81575699","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-02DOI: 10.1109/MPCS.1994.367083
K. Karagianni, E. Kyriakis-Bitzaros, T. Stouraitis
In this paper, Petri Nets (PNs) are used for deriving efficient mapping transformations of a wide class of algorithms to processor arrays. In the proposed methodology, given an algorithm and the interconnections of the processor array, two PNs are constructed: one that is related to the algorithm and one that is related to the processor array. The former PN models the execution of the algorithm and differs drastically from the common data-flow methods. Based on properties of PNs and on the reachability tree analysis technique, a theorem is given, through which the two PN model suggest all possible ways of implementing the algorithm by the processor array.<>
{"title":"Mapping iterative algorithms onto processor arrays by the use of Petri Net models","authors":"K. Karagianni, E. Kyriakis-Bitzaros, T. Stouraitis","doi":"10.1109/MPCS.1994.367083","DOIUrl":"https://doi.org/10.1109/MPCS.1994.367083","url":null,"abstract":"In this paper, Petri Nets (PNs) are used for deriving efficient mapping transformations of a wide class of algorithms to processor arrays. In the proposed methodology, given an algorithm and the interconnections of the processor array, two PNs are constructed: one that is related to the algorithm and one that is related to the processor array. The former PN models the execution of the algorithm and differs drastically from the common data-flow methods. Based on properties of PNs and on the reachability tree analysis technique, a theorem is given, through which the two PN model suggest all possible ways of implementing the algorithm by the processor array.<<ETX>>","PeriodicalId":64175,"journal":{"name":"专用汽车","volume":"70 1","pages":"140-151"},"PeriodicalIF":0.0,"publicationDate":"1994-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86109928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-02DOI: 10.1109/MPCS.1994.367061
A. Broggi
A massively parallel architecture is composed of a high number of processing elements (PE), but seldom a 1:1 mapping between the PEs and the data set can be achieved. To overcome this problem, a processor virtualization mechanism is needed. This work provides a theoretical study on performance optimization in the specific virtualization process used when a small amount of memory is associated to each PE. Moreover, this paper presents an algorithm for performance optimization and for the determination of the maximum processing speed on low-cost cellular array processors implementing the above mentioned visualization mechanism. These considerations are then used to improve the execution of morphological image processing tasks on the first hardware prototype of the special-purpose cellular array processor PAPRICA.<>
{"title":"Performance optimization on low-cost cellular array processors","authors":"A. Broggi","doi":"10.1109/MPCS.1994.367061","DOIUrl":"https://doi.org/10.1109/MPCS.1994.367061","url":null,"abstract":"A massively parallel architecture is composed of a high number of processing elements (PE), but seldom a 1:1 mapping between the PEs and the data set can be achieved. To overcome this problem, a processor virtualization mechanism is needed. This work provides a theoretical study on performance optimization in the specific virtualization process used when a small amount of memory is associated to each PE. Moreover, this paper presents an algorithm for performance optimization and for the determination of the maximum processing speed on low-cost cellular array processors implementing the above mentioned visualization mechanism. These considerations are then used to improve the execution of morphological image processing tasks on the first hardware prototype of the special-purpose cellular array processor PAPRICA.<<ETX>>","PeriodicalId":64175,"journal":{"name":"专用汽车","volume":"53 46 1","pages":"334-338"},"PeriodicalIF":0.0,"publicationDate":"1994-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80484385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-02DOI: 10.1109/MPCS.1994.367065
N. Scarabottolo, D. Sorrenti
In this paper, we present the parallel implementation of an algorithm for polygonal approximation of image contours-one of the steps involved in image processing for two-dimensional machine vision. The proposed algorithm proved to be a very good compromise between performance-typical of fast, scan-along (i.e., single-pass) algorithms-and quality-usually maximized by slow, iterative algorithms. A challenging task has been the implementation of this algorithm on a distributed-memory MIMD machine, constituted by a transputer network, since the necessity of considering data from a "global" point of view tends to overcharge the inter-processor communication structure. The proposed implementation of such an algorithm led to a satisfactory behaviour on small number of processing nodes, but showed also the need of a sophisticated protocol for information interchange among processing nodes, in order to overcome scalability limits.<>
{"title":"Polygonal approximation of image contours on parallel machines","authors":"N. Scarabottolo, D. Sorrenti","doi":"10.1109/MPCS.1994.367065","DOIUrl":"https://doi.org/10.1109/MPCS.1994.367065","url":null,"abstract":"In this paper, we present the parallel implementation of an algorithm for polygonal approximation of image contours-one of the steps involved in image processing for two-dimensional machine vision. The proposed algorithm proved to be a very good compromise between performance-typical of fast, scan-along (i.e., single-pass) algorithms-and quality-usually maximized by slow, iterative algorithms. A challenging task has been the implementation of this algorithm on a distributed-memory MIMD machine, constituted by a transputer network, since the necessity of considering data from a \"global\" point of view tends to overcharge the inter-processor communication structure. The proposed implementation of such an algorithm led to a satisfactory behaviour on small number of processing nodes, but showed also the need of a sophisticated protocol for information interchange among processing nodes, in order to overcome scalability limits.<<ETX>>","PeriodicalId":64175,"journal":{"name":"专用汽车","volume":"43 1","pages":"308-316"},"PeriodicalIF":0.0,"publicationDate":"1994-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73678806","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-02DOI: 10.1109/MPCS.1994.367056
J. You, E. Pissaloux, H. Cohen, P. Bonnin
Vision computing involves the execution of a large number of operations on large sets of structured data. The need for very high speed processing in image processing means parallel architectural solutions have to be explored. In this paper we propose the development of a dynamic texture analysis system using a multiprocessor system MEAP. The project is aimed to recognize and delineate the texture of image regions with robustness and reliability at less computation cost. Based on the successful prototype texture analysis system previously implemented sequentially by us, the system is expected to be flexible for parallel extension with a multiprocessor. The dynamic approach detailed involves a mask tuning scheme for the establishment of a rotational and scale invariant texture classification system in parallel.<>
{"title":"A dynamic analysis system for textured images using multiprocessors","authors":"J. You, E. Pissaloux, H. Cohen, P. Bonnin","doi":"10.1109/MPCS.1994.367056","DOIUrl":"https://doi.org/10.1109/MPCS.1994.367056","url":null,"abstract":"Vision computing involves the execution of a large number of operations on large sets of structured data. The need for very high speed processing in image processing means parallel architectural solutions have to be explored. In this paper we propose the development of a dynamic texture analysis system using a multiprocessor system MEAP. The project is aimed to recognize and delineate the texture of image regions with robustness and reliability at less computation cost. Based on the successful prototype texture analysis system previously implemented sequentially by us, the system is expected to be flexible for parallel extension with a multiprocessor. The dynamic approach detailed involves a mask tuning scheme for the establishment of a rotational and scale invariant texture classification system in parallel.<<ETX>>","PeriodicalId":64175,"journal":{"name":"专用汽车","volume":"22 1","pages":"375-381"},"PeriodicalIF":0.0,"publicationDate":"1994-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79555634","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-02DOI: 10.1109/MPCS.1994.367048
J. Stromboni, L. Kwiatkowski
In order to achieve satisfactory utilization of a massively parallel computer (MPC), one needs to consider at once the potential parallelism in the massively parallel algorithm (MPA), the method for implementation, and the MPC architecture and operating modes. The prototyping tool presented, gathers in a unique frame some specific means for simulation, mapping, scheduling, performance prediction and cost evaluation, to assist the initial choices during the design process of massively parallel applications. Some of the prototyping functions are experimented with and several architectural parameters are varied as an illustration of the prototyping process.<>
{"title":"MPCS prototyping using deterministic simulation","authors":"J. Stromboni, L. Kwiatkowski","doi":"10.1109/MPCS.1994.367048","DOIUrl":"https://doi.org/10.1109/MPCS.1994.367048","url":null,"abstract":"In order to achieve satisfactory utilization of a massively parallel computer (MPC), one needs to consider at once the potential parallelism in the massively parallel algorithm (MPA), the method for implementation, and the MPC architecture and operating modes. The prototyping tool presented, gathers in a unique frame some specific means for simulation, mapping, scheduling, performance prediction and cost evaluation, to assist the initial choices during the design process of massively parallel applications. Some of the prototyping functions are experimented with and several architectural parameters are varied as an illustration of the prototyping process.<<ETX>>","PeriodicalId":64175,"journal":{"name":"专用汽车","volume":"78 1","pages":"428-432"},"PeriodicalIF":0.0,"publicationDate":"1994-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75405625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-02DOI: 10.1109/MPCS.1994.367092
R. Hogg, D. Lloyd, W. I. Hughes
A self-timed bit-serial massively parallel architecture is currently being developed to behave correctly independent of intra- and inter-module delays. The self-timed approach abolishes the global clock thus overcoming the limitations associated with global control. These limitations include problems of fixed processing time, clock skew and restricted scalability. This paper introduces self-timed design techniques promoting bit-serial elastic control and data communication in scalable array architectures. A number of different design techniques are introduced and evaluated on a cost, performance basis using the bit-serial Self-Timed Single Instruction Systolic Array (ST-SISA) as a research vehicle.<>
{"title":"Communication techniques for a self-timed massively parallel architecture","authors":"R. Hogg, D. Lloyd, W. I. Hughes","doi":"10.1109/MPCS.1994.367092","DOIUrl":"https://doi.org/10.1109/MPCS.1994.367092","url":null,"abstract":"A self-timed bit-serial massively parallel architecture is currently being developed to behave correctly independent of intra- and inter-module delays. The self-timed approach abolishes the global clock thus overcoming the limitations associated with global control. These limitations include problems of fixed processing time, clock skew and restricted scalability. This paper introduces self-timed design techniques promoting bit-serial elastic control and data communication in scalable array architectures. A number of different design techniques are introduced and evaluated on a cost, performance basis using the bit-serial Self-Timed Single Instruction Systolic Array (ST-SISA) as a research vehicle.<<ETX>>","PeriodicalId":64175,"journal":{"name":"专用汽车","volume":"50 1","pages":"55-61"},"PeriodicalIF":0.0,"publicationDate":"1994-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85552171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-02DOI: 10.1109/MPCS.1994.367049
C. Papadopoulos
The effectiveness of combinatorial search heuristics, such as genetic algorithms (GA), is limited by their ability to balance the need for a diverse set of sampling points with the desire to quickly focus search upon potential solutions. One of the methods often used to address this problem is to simulate the theory of punctuated equilibria in the GA. The GA introduced uses the basic premises derived from punctuated equilibria, but hopes to remedy the problems associated with sudden introduction of new genetic material by relying upon a much greater degree of distribution and an overlapping population architecture. Presented here is a description and preliminary empirical test results of a massively distributed parallel genetic algorithm (mdpGA).<>
{"title":"On the parallel execution of combinatorial heuristics","authors":"C. Papadopoulos","doi":"10.1109/MPCS.1994.367049","DOIUrl":"https://doi.org/10.1109/MPCS.1994.367049","url":null,"abstract":"The effectiveness of combinatorial search heuristics, such as genetic algorithms (GA), is limited by their ability to balance the need for a diverse set of sampling points with the desire to quickly focus search upon potential solutions. One of the methods often used to address this problem is to simulate the theory of punctuated equilibria in the GA. The GA introduced uses the basic premises derived from punctuated equilibria, but hopes to remedy the problems associated with sudden introduction of new genetic material by relying upon a much greater degree of distribution and an overlapping population architecture. Presented here is a description and preliminary empirical test results of a massively distributed parallel genetic algorithm (mdpGA).<<ETX>>","PeriodicalId":64175,"journal":{"name":"专用汽车","volume":"37 1","pages":"423-427"},"PeriodicalIF":0.0,"publicationDate":"1994-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85396854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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